Software

Software Links

Related to iEDA

  • iEDA: A 28nm process RTL-GDS II digital chip design platform, creating a high-quality open-source EDA infrastructure and tool platform, supporting EDA academic research, talent cultivation, and key technology incubation. Includes: iLS, iMAP, iNO, iFP, iPDN, iPL, iCTS, iTO, iRT, iDR, iSTA, iPA, iDRC and other tools, as well as basic bases such as analysis, database, evaluation, interface, operation, solver, utility.

  • iFlow: Automated chip back-end design process, supporting 130/110/55/28nm processes, from RTL-GDS II automated back-end design full process.

  • iMAP: FPGA process mapping tool, supporting the generation from AIG to Netlist.

  • iParsers: Parsers required for EDA standard formats, including verilog, liberty, sdc, spef, sdf, vcd.

Related to AiEDA

  • AiEDA: Intelligent EDA framework and toolkit, supporting framework models for multiple AI4EDA tasks, supporting flexible invocation of iEDA tools or mainstream commercial EDA tools for researching and training AI+EDA models.

  • iBM: Construction of EDA label datasets.

  • AiDelay: Delay model based on wire length fitting.

  • AiSTA: Res-Unet timing learning model.

  • AiCap: 3D capacitance extraction network model represented by point cloud.

Code Base

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# jemdoc: menu{MENU}{modelines.html}, showsource