Publications
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Books & Chapters
《大规模集成电路设计方法(Large-scale Integrated Circuit Design Methods)》第8章 布线设计(Routing)
高等教育出版社(Higher Education Press)
Journal Papers
A Survey of Machine Learning Approaches in Logic Synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES), 2025 (CCF-B)
AiEDA: An Open-Source AI-Aided Design Library for Design-to-Vector
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2025 (CCF-A)
BoolSkeleton: Boolean Network Skeletonization via Homogeneous Pattern Reduction
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2025 (CCF-A)
AiDRC: Accelerating Detailed Routing by AI-Driven Design Rule Violation Prediction and Checking
ACM Transactions on Design Automation of Electronic Systems (TODAES), 2025 (CCF-B)
AiLO: A Predictive Framework for Logic Optimization Using Multi-Scale Cross-Attention Transformer
ACM Transactions on Design Automation of Electronic Systems (TODAES), 2025 (CCF-B)
iPO: Constant Liar Parameter Optimization for Placement with Representation and Transfer Learning
ACM Transactions on Design Automation of Electronic Systems (TODAES), 2025 (CCF-B)
AiTPO: KAN-UNet Heterogeneous Network for Timing Prediction and Optimization at Global Routing
ACM Transactions on Design Automation of Electronic Systems (TODAES), 2025 (CCF-B)
OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine Learning Tasks in Logic Synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2025 (CCF-A)
iCTS: Iterative and Hierarchical Clock Tree Synthesis With Skew-Latency-Load Tree
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2025 (CCF-A)
Personalized music recommendation algorithm based on machine learning
Multimedia Systems 31, no. 2 (2025): 166 (CCF-C)
A Delay-driven Iterative Technology Mapping Framework
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2025 (CCF-A)
QR-DeepONet: Resolve abnormal convergence issue related to basis dimension in DeepONet
Machine Learning, Science, 2025 (SCI Q1)
Delay-Driven Rectilinear Steiner Tree Construction
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024 (CCF-A)
AiTO: Simultaneous gate sizing and buffer insertion for timing optimization with GNNs and RL
Integration, the VLSI Journal, 2024 (CCF-C, SCI)
Large Circuit Models: Opportunities and Challenges
Science China Information Sciences (SCIS) (2024)
A novel automatic detection and classification algorithm for elderly cognitive impairment using CSVM
Biomed. Signal Process. Control. 93: 106195 (2024) (CCF-C, SCI)
k-Way Partitioning Algorithm Based on Re-Clustering and Discrete Optimization
Journal of Computer-Aided Design & Computer Graphics 36 (3), 473-484 (2024)
CFTNet: a robust credit card fraud detection model enhanced by counterfactual data augmentation
Neural Comput. Appl. 36(15): 8607-8623 (2024) (CCF-C, SCI)
Timing-aware fill insertions with design-rule and density constraints
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 10, pp. 3529-3542 (2021)(CCF-A)
Optimization models and algorithms for placement of very large scale integrated circuits
Operations Research Transactions (2021)
Toward graph classification on structure property using adaptive motif based on graph convolutional network
The Journal of Supercomputing (SC), pp.1–11, (2021)(CCF-C, SCI)
Discrete relaxation method for hybrid e-beam and triple patterning lithography layout decomposition
Journal of Ambient Intelligence and Humanized Computing (AIHC), pp.1–11 (2021) (CCF-C, SCI)
Unified contamination-aware routing method considering realistic washing capacity constraint in digital microfluidic biochips
IEEE Access 8, 192867-192879 (2020) (SCI)
DSA guiding template assignment with multiple redundant via and dummy via insertion
Integration, the VLSI Journal, vol. 70, pp. 32–42, 2020 (CCF-C, SCI)
Block Diagonal Dominance Based Dynamic Programming for Detecting Community
The Journal of Supercomputing (SC), 2019 (SCI)
DSA Guiding Template Assignment with Multiple Redundant Via and Dummy Via Insertion
Integration, the VLSI Journal, 2019 (CCF-C, SCI)
Using Cache Optimization Method to Reduce Network Traffic in Communication Systems Based on Cloud Computing
IEEE ACCESS, DOI. 10.1109/ACCESS.2019, 2019 (SCI)
Graph Based Redundant Via Insertion and Guiding Template Assignment for DSA-MP
IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 26, no. 11, pp. 2504-2517, 2018 (CCF-B, SCI)
Discrete Relaxation Method for Contact Layer Decomposition of DSA with Triple Patterning
Integration, the VLSI Journal, vol. 61, no. 1, pp. 77-87, 2018 (CCF-C, SCI)
Two-Stage Layout Decomposition for Hybrid E-Beam and Triple Patterning Lithography
ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 23, no. 1, 2017 (CCF-B, SCI)
Discrete relaxation method for triple patterning lithography layout decomposition
IEEE Transactions on Computers (TC), vol. 66, no. 2, pp. 285–298, 2017 (CCF-A, SCI)
Conference Papers
iPCL: Pre-training for Chip Layout
Proceedings of the 29th Asia and South Pacific Design Automation Conference (ASP-DAC), 2026 (CCF-C)
AiEDA-2.0: An Open-source AI-Aided Design (AAD) Library for Design-to-Vector
Proceedings of IEEE International Symposium of EDA (ISEDA), 2025
A Fast, Iterative Clock Skew Scheduling Algorithm with Dynamic Sequential Graph Extraction
Proceedings of Design Automation Conference (DAC), 2025 (CCF-A)
Differentiable Net-Moving and Local Congestion Mitigation for Routability-Driven Global Placement
Proceedings of Design Automation Conference (DAC), 2025 (CCF-A)
An Efficient Parallel Fault Simulator for Functional Patterns on Multi-core Systems
IEEE/ACM Design, Automation and Test in Europe Conference (DATE), 2025 (CCF-B)
Toward Advancing 3D-ICs Physical Design: Challenges and Opportunities
Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASP-DAC), 2025 (CCF-C)
NeuralSteiner: Learning Steiner Tree for Overflow-avoiding Global Routing in Chip Design
Proceedings of Annual Conference on Neural Information Processing Systems (NeurIPS), 2024 (CCF-A)
Simultaneous Conjugate Gradient and iAFF-UNet for Accurate IR Drop Calculation
Proceedings of IEEE International Conference on Computer Design (ICCD), 2024 (CCF-B)
Toward Controllable Hierarchical Clock Tree Synthesis with Skew-Latency-Load Tree
Proceedings of Design Automation Conference (DAC), San Francisco CA USA, 2024 (CCF-A)
Net Resource Allocation: A Desirable Initial Routing Step
Proceedings of Design Automation Conference (DAC), San Francisco CA USA, 2024 (CCF-A)
Instance-level Timing Learning and Prediction at Placement using Res-UNet Network
Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), Singapore, 2024 (CCF-C)
Parallel AIG Refactoring via Conflict Breaking
Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), Singapore, 2024 (CCF-C)
Collaborative Filtering in Latent Space: A Bayesian Approach for Cold-Start Music Recommendation
Proceedings of Pacific-Asia Conference on Knowledge Discovery and Data Mining (PAKDD) (5) 2024: 105-117 (CCF-C)
AiEDA: An Open-source AI-native EDA Library
Proceedings of IEEE International Symposium of EDA (ISEDA), 2024
Enhancing ASIC Technology Mapping via Parallel Supergate Computing
Proceedings of IEEE International Symposium of EDA (ISEDA), 2024
PCT-Cap: Point Cloud Transformer for Accurate 3D Capacitance Extraction
Proceedings of IEEE International Symposium of EDA (ISEDA), 2024
V-GR: 3D Global Routing with Via Minimization and Multi-Strategy Rip-up and Rerouting
Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASP-DAC), 2024 (CCF-C)
iEDA: An Open-source infrastructure of EDA (invited)
Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASP-DAC), 2024 (CCF-C)
iPD: An Open-source intelligent Physical Design Tool Chain (invited)
Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASP-DAC), 2024 (CCF-C)
AiMap: Learning to Improve Technology Mapping for ASICs via Delay Prediction
Proceedings of IEEE International Conference on Computer Design (ICCD), 2023 (CCF-B)
Adaptive Reconvergence-driven AIG Rewriting via Strategy Learning
Proceedings of IEEE International Conference on Computer Design (ICCD), 2023 (CCF-B)
Handling Orientation and Aspect Ratio of Modules in Electrostatics-based Large Scale Fixed-Outline Floorplanning
Proceedings of IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2023 (CCF-B)
iPL-3D: A Novel Bilevel Programming Model for Die-to-Die Placement
Proceedings of IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2023 (CCF-B)
FaFCNN: A General Disease Classification Framework Based on Feature Fusion Neural Networks
2023 IEEE International Conference on Systems, Man, and Cybernetics (SMC), 2023 (CCF-C)
Landslide Surface Displacement Prediction Based on VSXC-LSTM Algorithm
International Conference on Artificial Neural Networks (ICANN), 456-470, 2023 (CCF-C)
Weight Uncertainty in Transformer Network for the Traveling Salesman Problem
Proceedings of IEEE International Symposium of EDA (ISEDA), 2023
Lutplace: An Improved Lookup Table-Based Placement for Routability
2023 China Semiconductor Technology International Conference (CSTIC), 1-3, 2023
MEC: An Open-source Fine-grained Mapping Equivalence Checking Tool for FPGA
Proceedings of IEEE International Symposium of EDA (ISEDA), 2023
Accurate Timing Path Delay Learning using Feature Enhancer with Effective Capacitance
Proceedings of IEEE International Symposium of EDA (ISEDA), 2023
iEDA: An Open-Source Intelligent Physical Implementation Toolkit and Library
Proceedings of IEEE International Symposium of EDA (ISEDA), 2023 (Best Paper Award)
An Adaptive Partition Strategy of Galerkin Boundary Element Method for Capacitance Extraction
Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASP-DAC), 2023 (CCF-C)
Exploiting Architecture Advances For Sparse Solvers In Circuit Simulation
Proceedings of the IEEE/ACM Design, Automation and Testin Europe Conference (DATE), 2022 (CCF-B)
Timing-Aware Fill Insertions with Design-Rule and Density Constraints
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019 (CCF-B)
Mask And Template Assignment on DSA-MP With Triple BCP Materials Lithography
China Semiconductor Technology International Conference (CSTIC), 2019
Timing-Aware Fill Insertions with Uniformity Constraints
Proceedings of IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2019 (CCF-B)
Analytical Mixed-Cell-Height Legalization Considering Average and Maximum Movement Minimization
Proceedings of ACM International Symposium on Physical Design (ISPD), 2019 (CCF-C)
A Local Optimal Method on DSA Guiding Template Assignment with Redundant Dummy Via Insertion
Proceedings of IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC), 2019 (CCF-C)
Sparse VLSI Layout Feature Extraction: A Dictionary Learning Approach (Invited)
Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2018 (CCF-C)
Mixed-cell-height legalization considering technology and region constraints
Proceedings of IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2018 (CCF-B)
Mixed-Cell-Height Placement with Minimum-Implant-Area Constraints
Proceedings of IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2018 (CCF-B)
Cut Redistribution and DSA Template Assignment for Unidirectional Design
Proceedings of ASICON (ASICON), 2017 (EI)
Dissertation
Layout Decomposition Design for Manufacturability
Ph.D. Dissertation at Fuzhou University, June 2018 (Excellent Doctor Degree Dissertation Award in Fujian)